IEEE

Comparative Study of Transistor Logic Families in Half Adder Circuit Design

Abstract: This work analyses the half-adder circuit in different transistor logic families such as CMOS, Psuedo nMOS, Transmission Gate, Pass Transistor, Dynamic CMOS and Domino CMOS logics for area ...
IEEE

Design and Performance Analysis of CMOS, GDI, and PTL Logic Gates at 90nm Technology

Abstract: This paper presents a comparative design and simulation analysis of fundamental logic gates using CMOS, GDI, and PTL technologies at the 90 nm technology node. Six basic gates—AND, OR, NOT, ...